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Computer Arithmetic Demonstration and Test Facility

Daniel W. Lozier, ACMD
Michael A. Anuta, Cray Research, Inc,
Peter R. Turner, U.S. Naval Academy

Floating-point systems were introduced in the 1950s as an alternative to fixed-point which was notoriously difficult to use. The adoption of the IEEE Standard for Binary Floating-Point Arithmetic in 1985 was the culmination of many years of development. It stipulates the definition of parameters for the arithmetic and the reaction of the system when the arithmetic fails due to overflow, underflow, or division by zero. These stipulations are necessary because there is no mathematical basis of definition and because no consensus definition is fail-safe. It is generally agreed that the IEEE Standard provides the best possible floating-point design: no significant advance has occurred since 1985. Therefore interest in computer arithmetic has shifted to non-floating-point alternatives.

NIST has a long record of accomplishments in computer hardware and software, going back to the SEAC and SWAC machines of the post World War II era. ACMD is continuing this tradition with cutting-edge research projects in the development and dissemination, including electronic distribution, of mathematical software. Included in this record are contributions to the most prestigious forum for computer arithmetic, the IEEE Computer Society, through its biennial Symposia on Computer Arithmetic and its Transactions on Computers journal.

In this project we are developing a software facility for demonstrating and testing alternative computer arithmetics. The system will be used to simulate arithmetic operations, basic mathematical functions and associated system functions such as I/O. It is being implemented on a SIMD parallel computer with 4096 processors, the Maspar MP-1 located at the U.S. Naval Academy. This kind of computer architecture provides an ideal base for simulating arithmetic because the low-level hardware operations necessary to implement arithmetic map naturally to the processor array. A paper has been prepared for the next Symposium on Computer Arithmetic. A preprint is available as NISTIR 5569.

The project can be viewed as a contribution to the measurement services infrastructure for industry. It will provide methodology for realistic demonstration and testing of computer arithmetic. The new arithmetics are less prone to failure than conventional arithmetic, a potentially important characteristic in critical applications with requirements for very high reliability. Industrial interest in the project is evidenced by the support of Cray Research through the participation of Mr. Anuta, and further by the expected establishment of a three-way CRADA.



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Next: Computer Algebra Tools Up: Mathematical Algorithms and Previous: Computational Support of